paddress = CachePreDMA(vaddress,&length,flags)
D0 A0 A1 D0
APTR CachePreDMA(APTR,LONG *,ULONG);
Take all appropriate steps before Direct Memory Access (DMA). This function is primarily intended for writers of DMA device drivers. The action will depend on the CPU type installed, caching modes, and the state of any Memory Management Unit (MMU) activity.
This function supports advanced cache architectures that have "copyback" modes. With copyback, write data may be cached, but not actually flushed out to memory. If the CPU has unflushed data at the time of DMA, data may be lost.
As implemented
68000 - Do nothing
68010 - Do nothing
68020 - Do nothing
68030 - Do nothing
68040 - Write any matching dirty cache lines back to memory.
As a side effect of the 68040's design, matching data
cache lines are also invalidated. Future CPUs may
be different.
????? - External cache boards, Virtual Memory Systems, or
future hardware may patch this vector to best emulate
the intended behavior.
With a Bus-Snooping CPU, this function my end up
doing nothing.
Due to processor granularity, areas outside of the address range may be affected by the cache flushing actions. Care has been taken to ensure that no harm is done outside the range, and that activities on overlapping cache lines won't harm data.
"exec/execbase.i", <exec/execbase.h>,
CachePostDMA(),
CacheClearU(),
CacheClearE()